Positron raised $875M on a bet that memory bandwidth is the wrong constraint

Positron has raised $875 million at a $5 billion valuation for Asimov, a chip that forgoes HBM entirely in favour of 288GB to 2,304GB of LPDDR5X per die, taping out on TSMC N3P at the end of 2026.

Dropping HBM from an AI accelerator is close to heresy. It is worth understanding what has to be true for it to be right.

The trade being made

HBM buys bandwidth at enormous cost, in dollars, in packaging complexity and in supply constraint. LPDDR5X buys capacity cheaply and gives up a great deal of bandwidth. A design that swaps one for the other is betting that the binding constraint on its target workload is how much you can hold, not how fast you can stream.

For dense training, that bet is wrong and nobody disputes it. Training is bandwidth-bound and HBM exists precisely for it.

Where capacity actually binds

The bet becomes defensible for inference over very large sparse models and very long contexts. A mixture-of-experts model activates a fraction of its parameters per token but needs the whole thing resident to avoid paying for a fetch. A long-context system carries a KV cache that grows linearly with sequence length and, in agentic settings, is enormous — an agent forty tool calls into a task is carrying a context no chatbot turn ever approaches.

Two terabytes on a single die changes what fits without sharding. Sharding is where distributed inference gets its latency and its failure modes.

The second-order effect is operational, not economic

Multi-device inference is not just slower per token. It is harder to reason about. Model-parallel serving introduces cross-device synchronisation, partial-failure states where some shards respond and others do not, and tail latencies set by the slowest participant. Anyone who has debugged a production inference cluster knows the incident reports are about coordination, not compute.

If a model that previously required eight devices fits on one, an entire class of distributed-systems failure disappears. For systems in regulated environments, where every additional coordination point is something you have to argue about in a safety case, that simplification may be worth more than the throughput it costs.

The risk in the bet

It is a bet on a workload mix, made at tape-out, resolved in 2027. If frontier work moves back toward dense models, or if context windows stop growing because someone solves retrieval properly, the capacity advantage stops mattering and the bandwidth deficit is all that remains.

Worth watching as a signal regardless of outcome. Serious money is now being placed on the proposition that inference, not training, is the workload that will define the next generation of silicon — and that the shape of inference is changing fast enough to justify a different chip.

Written by the Devence Lab research team.